Ray Huang
	136-93 Caltech Moore Laboratory Pasadena, CA 91125 U.S.A. E-mail: r h u a n g at m e m s dot C a l t e c h dot e d u phone: (626) 395-2227 Cell: (626) 379-5374 fax: (626) 584-9104 Office: Moore 47

(I’m the second one from the left)

Education

• B.S. Electrical and Computer Engineering, Cornell University , 2001 - 2005
        Minor: Engineering Management
• M.S. Electrical Engineering, California Institute of Technology, 2005 - 2006

• Ph.D. Electrical Engineering, California Institute of Technology, 2006 -

Research

• Biological Implants Packaging and Integration
• Parylene cable and Packaging Reliability and Failure Analysis

Conference Publications

• R. Huang, Y. –C. Tai, “Flexible Parylene-Based 3-D Coiled Cable”, in The 5th IEEE International Conference on Nano/Micro Engineered and Molecular Systems, (NEMS '10) Xiamen, China, 2010.
• R. Huang, Y. –C. Tai, “Chip Integration with Flexible Parylene Pocket”, The 5th International Conference on Microtechnologies in Medicine and Biology (MMB ’09), 2009.
• R. Huang, Y.-C. Tai, “Parylene to Silicon Adhesion Enhancement”, The 15th International Conference on Solid-State Sensors, Actuators and Microsystems (Transducers ’09), 2009
• R. Huang, Y.-C. Tai, “Parylene-Pocket Chip Integration”, in The 22^nd IEEE International Conference on Micro Electro Mechanical Systems (MEMS ’09), 2009
• R. Huang, C. Pang, Y.-C. Tai, J. Emken, C. Ustun, R. A. Andersen, and J. W. Burdick, "Integrated Parylene-Cabled Silicon Probes for Neural Prosthetics," in The 21th IEEE International Conference on Micro Electro Mechanical Systems (MEMS '08), 2008
• R. Huang, C. Pang, Y.-C. Tai, J. Emken, C. Ustun, and R. A. Andersen, "Parylene coated silicon probes for neural prosthesis," in The 3rd IEEE International Conference on Nano/Micro Engineered and Molecular Systems, (NEMS '08) Sanya, Hainan, China, 2008.
• D.S. Rizzuto, S. Musallam, C. Pang, R. Huang, Y.-C. Tai, and R.A. Andersen, "The Caltech Brain-Machine Interface Platform", Society for Neuroscience, 2006

Patent

• Pocket-enabled Chip Assembly Technology - R. Huang and Y.–C. Tai (provision filed)

Posters

1. R. Huang, Alice Cho, Li-Hsien Wu, Wentai Liu, Y. -C. Tai, James Weiland, “Parylene Pocket Chip Integration for Prosthetic Applications”, BMES ERC 2009 Site Visit

Research Experience

Cornell University

• Mosquito Resonation Proboscis Project
• Evaluated the feasibility of Rubidium frequency standard for on-chip atomic clocks and designed a MEMS 60kHz oscillator WWVB receiver component with a comb resonator inductor

· Designed a MEMS microphone with bulk micromachining process

Palo Alto Research Center

• Surface and Air Spore Collection Solutions with Micropins and Stressed Metal Technology

Work and Teaching Experience

• Caltech Electrical Engineering Teaching Assistant
  EE 40, EE 187, EE 185
• Palo Alto Research Center (2005 Summer)
      Hardware System Lab - MEMS Intern
• Applied Materials Inc. (2004 summer)
      Competitive Intelligence and Corporate Marketing
• Industrial Technology Research Institute, Taiwan (2002 summer)
      WLAN Testing Engineer
• Cornell University (2003 - 2005)
      Computer instrumental design Teaching Assistant

Activities and Experiences

• Avid snowboarder, golfer and slowpitch softball player
• Co-President of Caltech Consulting Club (08 - 09)
• President of Association of Caltech Taiwanese (06 - 07)
• VP of Caltech Entrepreneur Club (05 -06)
• VP of Cornell Taiwanese Student Association (04 - 05)
• Publicity Chair for Cornell Engineering Peer Advisor (04 - 05)
• Cornell Entrepreneur Organization (02 - 05)